1. Field of the Invention
The present invention relates to a plasma processing apparatus for supplying a process gas into a process vessel in which an object to be processed is placed to perform plasma processing for the object.
2. Description of the Related Art
In general, in the steps in manufacturing a semiconductor, various processes, e.g., a film forming process, are performed for a semiconductor wafer serving as an object to be processed. As this film forming method, a plasma CVD (Chemical Vapor Deposition) method using both chemical and physical methods is known.
In a plasma processing apparatus for performing this process, for example, two plate-like electrodes are located parallel to each other in a process vessel, and a semiconductor wafer is placed on the lower electrode. An RF voltage of, e.g., 13.56 MHz, is applied from an RF power supply across these electrodes to generate a plasma, thereby performing a film forming process for the surface of the wafer.
The plasma generated between the parallel-plate electrodes as described above becomes an alternating magnetic field having an electric field extending from one electrode to the other electrode. For this reason, electrons and ions are moved by a magnetic force along this electric field, and the charged particles collide with gas molecules while the charged particles are moved. Therefore, a gas which is not easily thermally excited is activated, thereby performing desired film formation.
In order to increase the yield of semiconductor products, it is important to form a film having a uniform thickness in a wafer plane. The thickness of the formed film is considerably influenced by a source or process gas supply method.
The following process gas supply methods are known. First, a supply nozzle is inserted from the circumferential wall of a process vessel into the process vessel, and a source gas is supplied from the supply nozzle toward the upper surface of a wafer. Second, an upper electrode has a plate-like shower head structure, and a process gas is supplied from the upper electrode toward the upper surface of a wafer.
However, when only a process gas is supplied from the circumferential wall of a process chamber as described above, reactive species contributing to film formation do not easily reach the center of the wafer, and thus a film having a uniform thickness cannot be easily formed in a wafer plane.
In addition, even when a plate-like shower head structure is simply used, the flow of a supplied gas may be inadequately disturbed. In this case, the uniformity of a film thickness in a wafer plane cannot be easily assured.
The present inventors proposed, in a preceding application (Japanese Patent Application No. 5-317375), a so-called inductive coupling plasma forming method in which an antenna member is arranged in the upper portion in a process vessel or outside the ceiling portion of the process vessel, and a plasma is induced by an electromagnetic wave from the antenna member.
According to this inductive coupling plasma forming method, a plasma can be generated at a low pressure of 1.times.10.sup.-3 Torr or less, and the uniformity of the plasma can be improved. For this reason, the process characteristics of a plasma etching process or a plasma film forming process can be improved. However, when the shower head structure is employed in the inductive coupling plasma processing apparatus, an electromagnetic wave from the antenna member is partially absorbed by the shower head structure consisting of a dielectric, thereby decreasing plasma generation efficiency. For this reason, in the inductive coupling plasma processing apparatus, a process gas or the like must be supplied from the circumferential wall of the process vessel to prevent the plasma generation efficiency from being degraded. Therefore, the in-plane uniformity of a film thickness cannot be sufficiently assured as described above.
In particular, when a semiconductor wafer is increased in diameter, for example, when an 8-inch wafer is used, the uniformity of gas concentrations at the central and edge portions of the wafer poses a problem to be solved.